Instruction - Cycle
Table of Contents
1 - About
An instruction cycle (sometimes called fetch-decode-execute cycle) is the basic operation cycle of a computer.
The implementation from a logical point of view can be seen in the computer organization architecture.
From one CPU model to another, the complete pipeline (included all operations) may varied.
In most modern CPUs, the instruction cycle is instead executed concurrently in parallel, as an instruction pipeline: the next instruction starts being processed before the previous instruction is finished, which is possible because the cycle is broken up into separate steps.
2 - Articles Related
3 - Steps
3.1 - Fetch
3.2 - Decode
- Decode or identify the instruction,
3.3 - Execute
- Stores the result.
3.4 - End
4 - Counter
4.1 - TSC (Timestamp counter)
Each core on a moder CPU has a TSC (Timestamp counter) that counts the number of ticks that have transpired. See Tick count